Instruction Enhancement Programmes (IEP)


S.No Institute Date Topic
1 IIT Delhi 07-09 December 2015 System Level Design on Platform FPGAs
2 IISc Bangalore 04-08 July 2016 Mixed Signal SoC - from design to tapeout (hands-on)
3 IIT Bombay 11-13 July 2016 Analog, Mixed Signal and RF System Design
4 VNIT Nagpur 05-09 December 2016 Design issues related to Sub-Micron Technologies
5 IIT Guwahati & IIT Kharagpur 10-14 April 2017 Introduction to Analog and Digital Design
6 NIT Sikkim & IIT Kharagpur 05-09 June 2017 Mixed Signal and RFIC Design
7 IIT Madras 29 Jan - 02 Feb 2018 Analog IC Design
8 IIT Roorkee 24-27 Feb 2018 High Level Design to Silicon
9 IIT Kharagpur 19-23 March 2018 IoT for Structural Health Monitoring
10 Chip Centre, C-DAC Bengaluru 10-14 June 2019 PCB Design Methodologies
11 IISc Bangalore 24-28 June 2019 Mixed Signal SOC: From Design to Tape-out, a hands-on experience
12 NIT Rourkela 01-05 July 2019 Design Verification and Hardware Security
13 IIEST Shibpur 26-30 August 2019 Testing and Design-for-Testability for Digital Integrated Circuits
14 NIELIT Calicut 05-16 October 2020 Embedded System Design on FPGA covering Swadeshi Microprocessors
15 NIELIT Calicut 30 Nov-11 Dec 2020 Embedded System Design on FPGA covering Swadeshi Microprocessors-II
16 NIELIT Calicut 07-11 April 2021 Online Training on Embedded System Design using Swadeshi Processor on FPGA